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Sr. Signal & Power Integrity Engineer, Annapurna Labs - AI Silicon Packaging

ID: 4799

Type: Full-time

Category: Others

Company Name: Annapurna Labs (U.S.) Inc.

Location: USA, TX, Austin; USA, CA, Cupertino - Cupertino - United States

Salary: 183,000.00 - 247,600.00 USD annually

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Job Description

Annapurna Labs (our organization within AWS) designs silicon and software that accelerates innovation. Customers choose us to create cloud solutions that solve challenges that were unimaginable a short time ago—even yesterday. Our custom chips, accelerators, and software stacks enable us to take on technical challenges that have never been seen before, and deliver results that help our customers change the world.

We are seeking a Sr. Signal & Power Integrity Engineer to join our hardware team and drive the SI/PI analysis and optimization of advanced packaging solutions for next-generation machine learning and data center ASICs.

In this role, you will own the package-level signal and power integrity strategy — from early architecture trade-offs through design closure, measurement and validation. You'll work at the intersection of IC, package, and board, ensuring our advanced packaging technologies meet dynamic performance, power delivery, and manufacturing targets.

Key job responsibilities
- Lead package-level SI/PI analysis for 2.5D, 3D-IC, fan-out, and silicon interposer/bridge architectures.
- Design and optimize package stack-ups: dielectric material selection, impedance control, layer assignment, and RDL routing for high-speed and power delivery performance.
- Perform high-speed channel simulations (S-parameter extraction, time-domain analysis, eye diagrams) for die-to-die and die-to-board interfaces through the package.
- Analyze and optimize the package PDN end-to-end: decoupling strategy, plane resonance, IR drop, and AC impedance from die bumps through substrate to board.
- Characterize and model on-die capacitance, deep trench capacitors (DTCs), and integrated passive device (IPD) capacitors; evaluate their effectiveness within the full-stack PDN impedance profile.
- Interface with SoC die-level PDN teams to align power grid requirements, current profiles, and decoupling budgets across the chip-package boundary.
- Perform 3D/2.5D EMIR analysis using tools such as Ansys RedHawk-SC 3DIC, Cadence Voltus, or equivalent to validate IR drop and electromigration across multi-die stacked packages.
- Model advanced interconnects: microbumps, C4 bumps, TSVs, microvias, PTH vias, and RDL traces for both signal and power paths.
- Apply equalization techniques (DFE, CTLE, FFE) and evaluate package-level channel margins for PCIe, UCIe, and custom die-to-die links.
- Perform clock distribution and jitter analysis at the package level, accounting for coupling, skew, and return path discontinuities.
- Collaborate with ASIC design, board design, and packaging/assembly teams to co-optimize package architecture for electrical performance and manufacturing yield.
- Identify and mitigate package manufacturing risks — warpage, via reliability, impedance variation, and material tolerance impacts on SI/PI.
- Develop and maintain package SI/PI modeling flows, automation scripts, and design guidelines.

About the team
Our team is dedicated to supporting new members. We have a broad mix of experience levels and tenures, and we’re building an environment that celebrates knowledge-sharing and mentorship. Our senior members enjoy one-on-one mentoring and thorough, but kind, code reviews. We care about your career growth and strive to assign projects that help our team members develop your engineering expertise so you feel empowered to take on more complex tasks in the future.

Diverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.

About AWS
Amazon Web Services (AWS) is the world’s most comprehensive and broadly adopted cloud platform. We pioneered cloud computing and never stopped innovating — that’s why customers from the most successful startups to Global 500 companies trust our robust suite of products and services to power their businesses.

Inclusive Team Culture
Here at AWS, it’s in our nature to learn and be curious. Our employee-led affinity groups foster a culture of inclusion that empower us to be proud of our differences. Ongoing events and learning experiences, including our Conversations on Race and Ethnicity (CORE) and AmazeCon (gender diversity) conferences, inspire us to never stop embracing our uniqueness.

Work/Life Balance
We value work-life harmony. Achieving success at work should never come at the expense of sacrifices at home, which is why we strive for flexibility as part of our working culture. When we feel supported in the workplace and at home, there’s nothing we can’t achieve in the cloud.

Mentorship & Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.

Basic Qualifications

- Bachelor's degree in Electrical Engineering or a related field
- 10+ years of experience in signal integrity, power integrity, and package design
- Deep expertise in package SI/PI analysis: S-parameter extraction, PDN impedance analysis, IR drop, crosstalk, and return loss
- Hands-on experience with EM simulation and SI/PI tools such as HFSS, Cadence Sigrity (PowerSI, PowerDC, Clarity), ADS, or equivalent
- Strong understanding of advanced packaging technologies: 2.5D/3D-IC, silicon interposers, fan-out wafer-level packaging, RDL, TSVs, and microbump interconnects
- Experience analyzing and modeling decoupling technologies including on-die MOM/MOS capacitors, deep trench capacitors (DTCs), and IPD capacitors within the package PDN
- Proficiency in stack-up design and impedance control for multi-layer organic substrates and silicon interposers
- Hands-on experience correlating package SI/PI simulations with lab measurements (TDR, VNA, oscilloscope)

Preferred Qualifications

- - Master's in Electrical Engineering or related field
- -7+ years of experience, in signal integrity, power integrity, and package design
- - Experience with UCIe or other die-to-die interconnect standards in advanced packaging contexts
- - Familiarity with package-level thermal-aware PI analysis and electromigration considerations
- - Experience with EMC/EMI analysis and mitigation at the package level
- - Experience with high-speed serial protocols (PCIe Gen6/7, UCIe, or custom SerDes) at the package level
- - Knowledge of package co-design methodologies (chip-package-board co-simulation)
- - Experience with high-density fan-out or silicon bridge packaging (e.g., EMIB, CoWoS, or similar)
- - Experience with PDN target impedance methodology and frequency-domain decoupling optimization across die, package, and board domains

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.



USA, CA, Cupertino - 183,000.00 - 247,600.00 USD annually
USA, TX, Austin - 159,200.00 - 215,300.00 USD annually

Company Information

Company Name: Annapurna Labs (U.S.) Inc.

Company Website: https://annapurna-labs.com

Company Address: 10201 Torre Avenue, Cupertino, California 95014, USA

Annapurna Labs (U.S.) Inc. is the U.S. corporate entity of Annapurna Labs, an engineering organization originally founded as a semiconductor and systems-on-chip (SoC) design company that was acquired by Amazon in 2015 and subsequently integrated into Amazon Web Services (AWS). The business is organized around the design and delivery of custom silicon, hardware acceleration engines, and tightly integrated hardware–software platforms used to improve performance, security, and efficiency of cloud infrastructure. Annapurna Labs operates as an engineering and product-development organization whose principal output is purpose-built silicon, firmware, and supporting software stacks that are deployed inside AWS data centers and products. Company overview: Annapurna Labs began as a privately held microelectronics and chip-design startup with an emphasis on low-power, high-density compute and specialized accelerators. After acquisition by Amazon, the group continued as an internal Amazon/AWS engineering organization, focused on developing devices and subsystems that address bottlenecks in cloud servers and networking equipment. The organization is widely credited in official Amazon/AWS materials and public communications with designing and delivering several generations of custom AWS silicon and the enabling hardware subsystems that underpin notable AWS services and instance families. Core business activities: Annapurna Labs’ core activities center on end-to-end silicon and platform engineering: architecture, RTL and logic design, physical implementation, verification, firmware, board design, and the software integration required to bring custom chips into production at hyperscale. Key technical specializations include SoC and CPU core design, network and storage offload engines, hardware virtualization and security enclaves, high-speed interconnects, and low-level system software to exploit hardware capabilities. Instead of operating as a customer-facing chip vendor, the organization’s outputs are integrated into AWS infrastructure and services—its primary “customers” are AWS teams and the cloud customers that rely on AWS services. Main products and services: Public and official AWS communications associate Annapurna Labs with multiple internal silicon and platform programs that have been announced or described by Amazon. Notable outcomes attributable to the group include the AWS Nitro System, a collection of dedicated hardware and firmware components that offload virtualization functions (such as network and storage I/O and security isolation) from host CPUs, enabling higher performance and stronger isolation for EC2 instances; and the Graviton family of Arm‑based processors (Graviton and subsequent Graviton2/Graviton3 generations), which provide high performance per watt and are used in a wide range of EC2 instance types. Annapurna Labs’ technology has also contributed to AWS’s custom accelerators and specialized chips for inference and other workloads, along with supporting board and subsystem designs used across AWS server fleets. Operational model and customers: Following its acquisition, Annapurna Labs functions primarily as an in-house R&D and product engineering organization for Amazon/AWS rather than as a standalone commercial vendor selling chips directly to third parties. Its deliverables are integrated into AWS compute, storage, and networking products to improve throughput, reduce cost and power consumption, and enable new service capabilities. Through these integrations, AWS customers—enterprises, startups, and public-sector users—indirectly benefit from Annapurna Labs’ designs in the form of new instance types, specialized acceleration options, and platform-level features (for example, enhanced virtualization security provided through Nitro). Technology and integration focus: Annapurna Labs emphasizes hardware–software co-design, meaning the group develops chips and the low-level firmware and drivers required to expose their capabilities to higher-level cloud services. This includes designing secure firmware stacks, silicon-based root-of-trust features, and hardware acceleration engines for packet processing, storage offload, and cryptographic operations. The designs are intended to scale in rack- and data-center-level deployments; consequently, the organization also contributes to manufacturing qualification, supply-chain integration, and operational tooling required to bring new silicon into production across AWS’s global infrastructure. Strategic impact and role inside AWS: The creation and deployment of custom silicon and Nitro-class offload engines have been described in AWS materials as foundational to certain performance, security, and cost-efficiency improvements across Amazon’s cloud offerings. Annapurna Labs’ designs have enabled AWS to introduce distinct product capabilities—such as high-density, energy-efficient Arm-based compute instances and dedicated hardware paths for I/O and isolation—that differentiate AWS services in performance-per-dollar metrics and security posture. While Annapurna Labs itself is not a public-facing product company, its engineering outputs are a strategic enabler for AWS’s infrastructure roadmap and service portfolio. Publicly disclosed collaborations and communications: Details about Annapurna Labs and its projects have been shared in Amazon press releases, AWS blog posts, technical presentations, and regulatory filings since the acquisition. Those official channels describe the group’s role in developing the Nitro System and custom processors, as well as the subsequent use of that technology in EC2 instance families and other AWS services. As an entity, Annapurna Labs (U.S.) Inc. is a legal corporate unit tied to Amazon’s organizational and intellectual-property structure, responsible for managing U.S.-based engineering operations, compliance, and aspects of the commercial integration of its technologies within AWS. Limitations on external sales: Unlike independent semiconductor companies that market chips to a broad set of third-party OEMs, Annapurna Labs’ outputs are primarily intended for integration into Amazon/AWS infrastructure. As a result, most technical and product announcements emphasize the benefits delivered via AWS services rather than standalone Annapurna-branded products sold directly to external customers.
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